Producing ever-smaller semiconductor devices and computer-memory elements for VLSI is one of the most competitive and economically important technologies in the world. Additional, important applications of microscopic structures include catalysis, optical devices and computing, and superconductors.
The smallest structures currently used in VLSI have typical dimensions of approximately 1 .mu.m and edge definitions of approximately 0.05 .mu.m or 500 .ANG.. In this regard, see Chang et al., "Nanostructure Technology", IBM J. Res. Develop. 32, 462 (1988); and Hohn et al., "Advanced Electron-beam Lithography for 0.5 .mu.m to 0.25 .mu.m Device Fabrication," IBM J. Res. Develop. 32, 514 (1988). Fine pattern-lines are often a part of these devices, and these may have widths of 100-500 .ANG.. These structures and lines are normally made by "lithography", first exposing portions of substrate-covering resists, either through masks or by direct bombardment with photon, ion or electron beams. The unexposed (or opposite) portion of the resist is then chemically removed and the resulting exposed portions of the substrate are etched or overcoated.
These latter steps typically involve vapor or liquid deposition and etching, sometimes plasma assisted. This lithographic process is repeated with different masks and etch, doping or coating steps to produce the final device. Doping of various layers is typically achieved by highly energetic ion bombardment, driving dopant species into the material, or by diffusion inward from the exposed surface at elevated temperatures. Although high-energy electron and ion beams can be focused more finely than 100 .ANG., the size of the resulting pattern is limited so far to greater 100 .ANG. by the scattering of these particles at the film surface, which spreads the pattern. Etching also tends to spread patterns.
The scanning-tunneling-microscope (STM) described in U.S. Pat. No. 4,343,993 produces a highly-localized beam of low-energy electrons, so that it is feasible to use this instrument for nanolithography (See Binnig et al., Phys. Rev. Lett., 49. 57 (1982) and 50. 120 (1983)). In two reported attempts at this, lines of apparently .about.100 .ANG. width were achieved by exposing a resist and a glassy alloy to the electron current from an STM (See McCord et al., "Lithography with the Scanning Tunneling Microscope", J. Vac. Sci. Technol. B 4, 86 (1986); and Ringer et al., "Nanometer Lithography with the Scanning Tunneling Microscope", Appl. Phys. Lett. 46, 832 (1985)).
Another approach to writing fine lines or depositing metallic lines on a substrate with an STM can be found in U.S. Pat. No. 4,550,257. Here it was proposed that metal-atom containing gas molecules, introduced into a vacuum system, would be dissociated by the electron beam from a typically 5 V biased STM tip. The electrons would collisionally dissociate some of the gas molecules as they passed between tip and substrate, and for a tip-substrate spacing of approximately 20 .ANG. the dissociation products would strike and build up in a very local region of the substrate, producing a metal line of very narrow width as the tip is scanned parallel to the surface. As described in Silver et al., "Direct Writing of Submicron Metallic Features with a Scanning Tunneling Microscope", Appl. Phys. Lett. 51, 247 (1987), there were some complications and this was not successfully achieved by the patentees. Furthermore, this device does not permit single-atom depositional control of the atomic substituents, but rather is directed to a random deposition mechanism.
However, in 1987 a short, approximately 250 .ANG. wide line of Cd was deposited from Cd (CH.sub.3).sub.2 gas onto a photolithography material using an STM current, by a different research group who used quite different conditions and suggest that the deposition was probably due to microscopic plasma between the probe and substrate (See Silver et al.). The authors further report the possibility of also achieving etch patterns below an STM tip, using halogen molecules in place of the metal organic molecules often used for deposition. According to Lin et al., "High Resolution Photoelectrochemical Etching of n-GaAs with the Scanning Electrochemical and Tunneling Microscope", J. Electrochem. Soc. 134, 1038 (1987), STM-tip controlled etching of GaAs has been achieved by immersing in an electrolyte liquid and at the same time illuminating the gap to induce photochemical reactions. Here the tip-substrate spacing was approximately 1 .mu.m and 0.3-2 .mu.m wide etch patterns were obtained, using unspecified conditions.
Mechanical "scratching" of fine lines with a tungsten STM probe tip has also been reported in Abraham et al., "Surface Modification with the Scanning Tunneling Microscope", IBM J. Res. Develop. 30, 492 (19); and McCord et al., "Scanning Tunneling Microscope as a Micromechanical Tool", Appl. Phys. Lett. 50, 569 (1987). Transfer of single Ge atoms, apparently from a scratch-coated tungsten probe tip to a Ge crystal, has also been reported in Becker et al., "Atomic-scale Surface Modifications Using a Tunneling Microscope", Nature 325, 419 (1987).
Writing narrow metal lines by probe-to-substrate metal-atom transfer, induced by field desorption at the highest-field probe tip end, has been patented by Binnig et al. in U.S. Pat. No. 4,539,089. Here the metal atoms (e.g. Au atoms) diffuse about the heated tungsten tip and are continuously supplied at the upper end. This patent, however, is not based on the use of chemical vapor deposition (hereinafter CVD) molecules to bring the depositing atoms to the nanostructure, but rather is directed toward laying down metal lines.
The above investigations and patents were directed towards adding fine lines of homogeneous unstructured material to produce a mask for the lithographic method of VLSI semiconductor production. The overwhelming majority of the prior art is also based on the construction of lithographic masks using photon electron or ion beams, since the total time required to produce the entire VLSI pattern would be prohibitive without multiple use of the mask. These are several problems associated with the use of these beams to produce very fine-lined masks. These include, for example, (1) a high-energy electron or ion beam traversing a large gap (necessary for focusing) which ionizes and dissociates the gas along the entire path, producing deposition everywhere, and a discharge if pressures exceed .about.0.01 Torr; (2) energetic electrons from high-energy electron beams which scatter and spread from the initial point of contact, producing gas dissociation, deposition and sometimes film damage over an extended region; (3) energetic ions causing severe substrate damage about the point of impact, as well as inducing sputtering; ion beams are well-suited to producing masks or sputtering-away substrates, but not to deposition; (4) the laser spot size being diffraction limited, so that it can not be used for .ltoreq.100 nm scale writing; (5) the fact that none of the beam methods can directly detect, at the nm level, the consequences of their action on the substrate surface, and thus there is no self-adjustment ability.
Some of the problems plaguing the attempts at STM-based lithography can be attributed to the nanometer probe tip which is utilized. The standard STM probe tip has a radius of curvature of .gtoreq.1000 Angstroms (.ANG.), and when this is placed close enough to the substrate to yield a single field-emission point (generally 1-30 .ANG.) the probe tip to substrate spacing changes very little over a circle of a few hundred .ANG. diameter. It is thus extremely difficult for CVD molecules to diffuse through this narrow gap to the center, where deposition is intended. Furthermore, the molecules traverse this gap with repeated surface absorptions and desorptions, and the field-emission current is often drawn to the adsorbed CVD molecule because it lowers the field-emission tunneling barrier. Thus, the CVD molecule is almost certain to be collisionally dissociated and attach to substrate or probe long before reaching the normal emitting point at the center. The result is enormous STM current noise accompanied by tip-shape and substrate deterioration as CVD atoms deposit randomly all over this extended probe and substrate region. If the probe-substrate spacing is increased beyond the normal range, the gas-flow problem is somewhat alleviated but the emitting point is even less well defined and the CVD molecules still attract the emission current and deposit over a large region (&gt;100 .ANG.).
Nanostructure fabrication of large arrays (typically 10.sup.6 -10.sup.12) of device would require a parallel-process fabrication method and tool to be acceptable in terms of manufacturing time. In present-day semiconductor technology fabrication is achieved by lithography, and devices with dimensions as small as approximately 5000 .ANG. are achieved in a manufacturing context. Here a substrate resist is exposed through a mask which contains an array of repeating shapes; thus the entire substrate is "written" in one exposure. Of course, the mask itself has to be created and several different mask and exposure steps are necessary for each device, but masks can be used many times. Masks are formed with the necessary fine lines using optical, electron, x-ray, .gamma.-ray or ion beams, with current smallest-size limits of approximately 200 .ANG.. Etching or deposition occurs on the exposed portions of the substrate and further limits practical smallest sizes.
Thus, no current method is capable of forming single or multiple-pattern nanostructures with non-random control of atomic constituents other than those of the starting crystal, nor has any achieved &lt;200 .ANG. dimensions. (The current status of small-device technology is further reviewed in the two previously described articles by Chang et al., and Hohn et al.) These methods do not appear capable of achieving .ltoreq.100 .ANG. nanostructures with the single-atom dimensional and chemical control necessary to be useful. Thus, even with future advances in current lithographic methods there may be no competing methodology to that which will be described herein as part of the present invention.